The chip, details of which were unveiled at the International Solid-State Circuits Conference 2001 (ISSCC) in San Diego last week, can simultaneously encode two MPEG-4 video streams, decode four MPEG-4 video streams or encode a single stream while decoding two streams, the company said in a statement. MPEG-4 is a video compression system designed for applications where bandwidth is limited.
Matsushita, which is better known by its Panasonic brand name, plans to offer the chip for use in next-generation cellular telephones that offer videoconferencing functions.
Such simultaneous encoding and decoding of multiple streams is already possible, although more than one chip must be used to accomplish the task. In set-top box or PC-based videoconferencing systems, this is not a problem but in cellular telephones, where space is at a premium, the ability to do all of this on a single chip is a big advantage.
Features include the ability to encode at either 15 or 30 frames per second in resolutions of 352 by 288 pixels, or CIF (Common Image Format) size, or 176 by 144 pixels, or QCIF (Quarter CIF) size. Further reducing the amount of space needed, DRAM (Dynamic Random Access Memory) is embedded on the LSI (large scale integrated circuit) chip, meaning external memory is not needed.
Sample shipments of the chip are scheduled to begin in the second quarter of 2001.
